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MCRF355/360
13.56 MHz Passive RFID Device with Anti-Collision Feature
Features
* * * * * * * * * * * * * Carrier frequency: 13.56 MHz Data modulation frequency: 70 kHz Manchester coding protocol 154 bits of user memory On-board 100 ms SLEEP timer Built-in anti-collision algorithm for reading up to multiple tags in the same RF field "Cloaking" feature to minimize the detuning effects of adjacent tags Internal 100 pF resonant capacitor (MCRF360) Read only device in RF field Long read range Rewritable with contact programmer or factoryprogrammed options Very low power CMOS design Die, wafer, bumped wafer, COB, PDIP or SOIC package options
Package Type
PDIP/SOIC VPRG CLK Ant. A NC Note: 1 2 3 4 8 7 6 5 VDD NC Ant. B VSS
Pins 1, 2, 5 and 8 are for device testing and contact programming. Pins 3, 5 and 6 are for external antenna connection. NC = Not connected
Application
* * * * * Book store and library book ID Airline baggage tracking Toys and gaming tools Access control/asset tracking Applications for reading multiple tags and long read range
RF Carrier Reader Modulated RF Data
MCRF355 COB
5 mm
Ant. A
MCRF355/360
Ant. B Vss
Read range: ~ up to 1.5 meters depending on tag size and system requirements.
Thickness = 0.4 mm
2002 Microchip Technology Inc.
DS21287F-page 1
Antenna Coil Connection
8 mm
MCRF355/360
Description
The MCRF355 and MCRF360 are Microchip's 13.56 MHz microIDTM family of RFID tagging devices. They are uniquely designed read-only passive Radio Frequency Identification (RFID) devices with an advanced anti-collision feature. They are programmable with a contact programmer. The device is powered remotely by rectifying RF magnetic fields that are transmitted from the reader. The device has a total of six pads (see Figure 1-1). Three (ant. A, B, VSS) are used to connect the external resonant circuit elements. The additional three pads (VPRG, CLK, VDD) are used for programming and testing of the device. The device needs an external resonant circuit between antenna A, B, and VSS pads. The resonant frequency of the circuit is determined by the circuit elements between the antenna A and VSS pads. The resonant circuit must be tuned to the carrier frequency of the reader for maximum performance. The circuit element between the antenna B and VSS pads is used for data modulation. See Application Note AN707 for further operational details. The MCRF360 includes a 100 pF internal resonant capacitor (100 pF). By utilizing this internal resonant capacitor, the device needs external coils only for the resonant circuit. Examples of the resonant circuit configuration for both the MCRF355 and MCRF360 are shown in Section 3.0. When a tag (device with the external LC resonant circuit) is brought to the reader's RF field, it induces an RF voltage across the LC resonant circuit. The device rectifies the RF voltage and develops a DC voltage. The device becomes functional as soon as VDD reaches the operating voltage level. The device includes a modulation transistor that is located between antenna B and VSS pads. The transistor has high turn-off (a few M) and low turn-on (3 ) resistance. The turn-on resistance is called modulation resistance (RM). When the transistor turns off, the resonant circuit is tuned to the carrier frequency of the reader. This condition is called uncloaking. When the modulation transistor turns on, its low turn-on resistance shorts the external circuit element between the antenna B and VSS. As a result, the resonant circuit no longer resonates at the carrier frequency. This is called cloaking. The induced voltage amplitude (on the resonant circuit) changes with the modulation data: higher amplitude during uncloaking (tuned), and lower amplitude during cloaking (detuned). This is called "amplitude modulation" signal. The receiver channel in the reader detects this amplitude modulation signal and reconstructs the modulation data. The occurrence of the cloaking and uncloaking of the device is controlled by the modulation signal that turns the modulation transistor on and off, resulting in communication from the device to the reader. The data stream consists of 154 bits of Manchesterencoded data at a 70 kHz rate. The Manchester code waveform is shown in Figure 2-2. After completion of the data transmission, the device goes into SLEEP mode for about 100 ms. The device repeats the transmitting and SLEEP cycles as long as it is energized. During the SLEEP time the device remains in an uncloaked state. SLEEP time is determined by a built-in low-current timer. There is a wide variation of the SLEEP time between each device. This wide variation of SLEEP time results in a randomness of the time slot. Each device wakes up and transmits its data in a different time slot with respect to each other. Based on this scenario, the reader is able to read many tags that are in the same RF field. The device has a total of 154 bits of reprogrammable memory. All bits are reprogrammable by a contact programmer. A contact programmer (part number PG103003) is available from Microchip Technology Inc. Factory programming prior to shipment, known as Serialized Quick Turn ProgrammingSM (SQTPSM), is also available. The device is available in die, wafer, bumped wafer, wafer-on-frame, PDIP, SOIC and COB modules.
Note:
Information provided herein is preliminary and subject to change without notice.
DS21287F-page 2
2002 Microchip Technology Inc.
MCRF355/360
1.0 ELECTRICAL CHARACTERISTICS
ABSOLUTE RATINGS
Symbol IPP_AC TASM TSTORE Min -- -- -65 Max 40 265 150 Units mA C C < 10 sec -- Conditions Peak-to-Peak coil current
TABLE 1-1:
Parameters Coil Current Assembly temperature Storage temperature
TABLE 1-2:
DC CHARACTERISTICS
Commercial (C): TAMB = -20oC to 70oC
All parameters apply across the specified operating ranges, unless otherwise noted. Parameters Reading voltage Hysteresis voltage Operating current Testing voltage Programming voltage: High level input voltage Low level input voltage High voltage Current leakage during SLEEP time Modulation resistance
Symbol VDDR VHYST IDDR VDDT VIH VIL VHH IDD_OFF RM
Min 2.4 -- -- -- 0.7 * VDDT -- -- -- --
Typ -- TBD 7 4 -- -- 20 10 3
Max -- -- 10 -- -- 0.3 * VDDT -- -- 4
Units V TBD A V V V V nA --
Conditions VDD voltage for reading VDD = 2.4V during reading at 25C -- External DC voltage for programming and testing (Note 1) DC resistance between Drain and Source gates of the modulation transistor (when it is turned on) CLK and VPRG internal pull-down resistor
Pull-Down resistor
RPDW
5
8
--
k
Note 1: This parameter is not tested in production.
2002 Microchip Technology Inc.
DS21287F-page 3
MCRF355/360
TABLE 1-3: AC CHARACTERISTICS
All parameters apply across Commercial (C): TAMB = -20oC to 70oC the specified operating ranges, unless otherwise noted. Parameters Carrier frequency Modulation frequency Coil voltage during reading Coil clamp voltage Test mode clock frequency SLEEP time Internal resonant capacitor (MCRF360) Write/Erase pulse width Clock high time Clock low time STOP condition pulse width STOP condition setup time Setup time for high voltage High voltage delay time Data input setup time Data input hold time Output valid from clock Data retention Symbol FC FM VPP_AC VCLMP_AC FCLK TOFF CRES TWC THIGH TLOW TPW:STO TSU:STO TSU:HH TDL:HH TSU:DAT THD:DAT TAA -- 50 85 -- -- -- -- -- -- -- -- -- -- 200 58 4 -- Min Typ 13.56 70 -- 32 115 100 100 2 4.4 4.4 1000 200 800 800 450 1.2 200 82 -- -- 500 200 115 10 -- -- -- -- -- -- -- -- -- -- Max Units kHz VPP VPP kHz ms pF ms s s ns ns ns ns ns s ns Conditions Manchester coding, at VDD = 2.6 VDC - 5 VDC Peak-to-Peak AC voltage across the coil during reading Peak-to-Peak coil clamp voltage 25C Off time for anti-collision feature, at 25C and VDD = 2.5 VDC Internal resonant capacitor between Antenna A and VSS, at 13.56 MHz Time to program bit, at 25C 25C for testing and programming 25C for testing and programming 25C for testing and programming 25C for testing and programming 25C for testing and programming Delay time before the next clock, at 25C for testing and programming 25C for testing and programming 25C for testing and programming 25C for testing and programming
MHz Reader's transmitting frequency
Years For T < 120C
DS21287F-page 4
2002 Microchip Technology Inc.
MCRF355/360
TABLE 1-4:
Pad Name Ant. A Ant. B VSS VDD CLK VPRG
PAD COORDINATES (MICRONS)
Lower Lower Left X Left Y -610.0 -605.0 -605.0 463.4 463.4 463.4 489.2 -579.8 -58.2 -181.4 496.8 157.6 Upper Right X -521.0 -516.0 -516.0 552.4 552.4 552.4 Upper Right Y 578.2 -490.8 30.8 -92.4 585.8 246.6 Passivation Openings Pad Width 89 89 89 89 89 89 Pad Height 89 89 89 89 89 89 Pad Pad Center X Center Y -565.5 -560.5 -560.5 507.9 507.9 507.9 533.7 -535.3 -13.7 -136.9 541.3 202.1
Note 1: All coordinates are referenced from the center of the die. The minimum distance between pads (edge to edge) is 10 mil. 2: Die Size = 1.417 mm x 1.513 mm = 1417 m x 1513 m = 55.79 mil x 59.57 mil
FIGURE 1-1:
DIE LAYOUT
Y (Notch edge of wafer)
1162.4 Ant A x x CLK
250.2 458.4 767.2 x 1158 VSS x
VPRG X 1513
250
432.6
x
VDD
Ant B
x
1157.4
1417
Die size before saw: 1417 m x 1513 m 55.79 mil x 59.57 mil
Die size after saw: 1353.8 m x 1450.34 m 53.3 x 57.1 mil
Bond pad size: 89 m x 89 m 3.5 mil x 3.5 mil
2002 Microchip Technology Inc.
DS21287F-page 5
MCRF355/360
TABLE 1-5: PAD FUNCTION TABLE
Name Ant. A Ant. B VSS VDD CLK VPRG Function Connected to external resonant circuit, (Note 1) Connected to external resonant circuit, (Note 1) Connected to external resonant circuit, (Note 1) Device ground during Test mode DC voltage supply for programming and Test mode Main clock pulse for programming and Test mode Input/Output for programming and Test mode
Note 1: See Figure 3-1 for the connection with external resonant circuit.
TABLE 1-6:
DIE MECHANICAL DIMENSIONS
Specifications Min. -- -- -- -- -- -- 7.5 190.5 10 254 Typ. 8 80 12,000 24 3.5 x 3.5 89 x 89 8 203.2 11 279.4 Max. -- -- -- -- -- -- 8.5 215.9 12 304.8 Unit inch m die wafer mil m mil m mil m (Note 1, Note 2) Sawed 8" wafer on frame (option = WF) (Note 3) * Bumped, sawed 8" wafer on frame (option = WFB) * Unsawed wafer (option = W) * Unsawed 8" bumped wafer (option = WB), (Note 3) (Note 4) -- -- Comments
Wafer Diameter Die separation line width Dice per wafer Batch size Bond pad opening Die backgrind thickness
Die passivation thickness (multilayer) Die Size: Die size X*Y before saw (step size) Die size X*Y after saw
-- -- --
1.3 55.79 x 59.57 53.3 x 57.1
-- -- --
m mil mil
Note 1: The bond pad size is that of the passivation opening. The metal overlaps the bond pad passivation by at least 0.1 mil. 2: Metal Pad Composition is 98.5% Aluminum with 1% Si and 0.5% Cu. 3: As the die thickness decreases, susceptibility to cracking increases. It is recommended that the die be as thick as the application will allow. 4: The Die Passivation thickness (1.3 m) can vary by device depending on the mask set used. - Layer 1: Oxide (undoped oxide) - Layer 2: PSG (doped oxide) - Layer 3: Oxynitride (top layer) 5: The conversion rate is 25.4 m/mil.
Note:
Extreme care is urged in the handling and assembly of die products since they are susceptible to mechanical and electrostatic damage.
DS21287F-page 6
2002 Microchip Technology Inc.
MCRF355/360
2.0 FUNCTIONAL DESCRIPTION
2.1.3 DATA MODULATION
The device contains three major sections: (1) Analog Front-End, (2) Controller Logic and (3) Memory. Figure 2-1 shows the block diagram of the device. The data modulation circuit consists of a modulation transistor and an external LC resonant circuit. The external circuit must be tuned to the carrier frequency of the reader (i.e., 13.56 MHz) for maximum performance. The modulation transistor is placed between antenna B and Vss pads and has small turn-on resistance (RM). This small turn-on resistance shorts the external circuit between the antenna B and Vss pads as it turns on. The transistor turns on during the "Hi" period of the modulation data and turns off during the "Lo" period. When the transistor is turned off, the resonant circuit resonates at the carrier frequency. Therefore, the external circuit develops maximum voltage across it. This condition is called uncloaking (tuned). When the transistor is turned on, its low turn-on resistance shorts the external circuit, and therefore the circuit no longer resonates at the carrier frequency. The voltage across the external circuit is minimized. This condition is called cloaking (detuned). The device transmits data by cloaking and uncloaking based on the on/off condition of the modulation transistor. Therefore, with the 70 kHz - Manchester format, the data bit "0" will be sent by cloaking (detuned) and uncloaking (tuned) the device for 7 s each. Similarly, the data bit "1" will be sent by uncloaking (tuned) and cloaking (detuned) the device for 7 s each. See Figure 2-2 for the Manchester waveform.
2.1
Analog Front-End Section
This section includes power supply, Power-on Reset, and data modulation circuits.
2.1.1
POWER SUPPLY
The power supply circuit generates DC voltage (VDD) by rectifying induced RF coil voltage. The power supply circuit includes high-voltage clamping diodes to prevent excessive voltage development across the antenna coil.
2.1.2
POWER-ON-RESET (POR)
This circuit generates a Power-on Reset when the tag first enters the reader field. The RESET releases when sufficient power has developed on the VDD regulator to allow for correct operation.
FIGURE 2-1:
BLOCK DIAGRAM
CONTROLLER LOGIC SECTION MEMORY SECTION
ANALOG FRONT-END SECTION
Power Supply Power-on Reset Modulation
VDD POR
Column and Row Decoders Clock Generator Modulation Logic
Address CLK Pulse Data Wake-up Signal 154-Bit Memory Array Column Drivers (High Voltage Circuit)
Modulation Pulse
SLEEP Timer (anti-collision) Read/Write Logic Test Logic
Set/Clear
VPRG and CLK
2002 Microchip Technology Inc.
DS21287F-page 7
MCRF355/360
2.2
2.2.1
Controller Logic Section
CLOCK PULSE GENERATOR
2.2.3
SLEEP TIMER
This circuit generates a clock pulse (CLK). The clock pulse is generated by an on-board time-base oscillator. The clock pulse is used for baud rate timing, data modulation rate, etc.
This circuit generates a SLEEP time (100 ms 50%) for the anti-collision feature. During this SLEEP time (TOFF), the modulation transistor remains in a turnedon condition (cloaked) which detunes the LC resonant circuit.
2.2.2
MODULATION LOGIC
2.2.4
READ/WRITE LOGIC
This logic acts upon the serial data (154 bits) being read from the memory array. The data is then encoded into Manchester format. The encoded data is then fed to the modulation transistor in the Analog Front-End section. The Manchester code waveform is shown in Figure 2-2.
This logic controls the reading and programming of the memory array.
FIGURE 2-2:
SIGNAL Data
CODE WAVEFORMS
WAVEFORM DESCRIPTION
1
0
1
1
0
0
0
1
1
0
1
0
Digital Data Internal Clock Signal
CLK
BIPHASE-L (Manchester)
Biphase - Level (Split Phase) A level change occurs at middle of every bit clock period. "1" is represented by a high to low level change at midclock. "0" is represented by a low to high level change at midclock. Non-Return to Zero - Level "1" is represented by logic high level. "0" is represented by logic low level.
NRZ-L (Reference only)
Note: The CLK and NRZ-L signals are shown for reference only. BIPHASE-L (Manchester) is the device output.
DS21287F-page 8
2002 Microchip Technology Inc.
MCRF355/360
3.0 RESONANT CIRCUIT
The MCRF355 requires external coils and capacitor in order to resonate at the carrier frequency of the reader. About one-fourth of the turns of the coil should be connected between antenna B and VSS; remaining turns should be connected between antenna A and B pads. The MCRF360 includes a 100 pF internal resonant capacitor. Therefore, the device needs only external coils for the resonant circuit. For example, the device needs 1.377 H of inductance for the carrier frequency = 13.56 MHz. Figures 3-1 (a) and (b) show possible configurations of the external circuits for the MCRF355. In Figure 3-1 (a), two external antenna coils (L1 and L2) in series and a capacitor that is connected across the two inductors form a parallel resonant circuit to pick up incoming RF signals and also to send modulated signals to the reader. The first coil (L1) is connected between antenna A and B pads. The second coil (L2) is connected between antenna B and VSS pads. The capacitor is connected between antenna A and VSS pads. Figure 3-1(b) shows the resonant circuit formed by two capacitors (C1 and C2) and one inductor. Figure 3-1(c) shows a configuration of an external circuit for the MCRF360. By utilizing the 100 pF internal resonant capacitor, only L1 and L2 are needed for the external circuit.
FIGURE 3-1:
CONFIGURATION OF EXTERNAL RESONANT CIRCUITS
1 f 0 = ----------------------2 CL T
RF Carrier Interrogator Modulated RF Data C L1 L2
Ant. A
Where:
MCRF355 Ant. B VSS L1 > L2 (a)
LT LM
= L1 + L2 + 2LM = Mutual inductance between L1 and L2
RF Carrier C1 Interrogator Modulated RF Data L
Ant. A
MCRF355 Ant. B C2 VSS C1 C2
1 f 0 = ------------------------------------------C1C2 2 L --------------------- C1 + C2
(b)
Ant. A RF Carrier Interrogator Ant. B Modulated RF Data L2 VSS L1 > L2 (c) L1 100 pF MCRF360
1 f 0 = ---------------------------------------------------------- 12 ) 2 ( L T ) ( 100x10
Where: LT LM = L1 + L2 + 2LM = Mutual inductance between L1 and L2
2002 Microchip Technology Inc.
DS21287F-page 9
MCRF355/360
4.0 DEVICE PROGRAMMING
3. 4. 5. MCRF355/360 is a reprogrammable device in Contact mode. The device has 154 bits of reprogrammable memory. It can be programmed in the following procedure. (A programmer, part number PG103003, is also available from Microchip). The above mode function (3.2.2) will be executed when the last bit of code is entered. Power the device off (VDD = VSS) to exit Programming mode. An alternative method to exit the Programming mode is to bring CLK logic "High" before VPRG to VHH (high voltage). Any Programming mode can be entered after exiting the current function.
4.1
Programming Logic
6.
Programming logic is enabled by applying power to the device and clocking the device via the CLK pad while loading the mode code via the VPRG pad (See Examples 4-1 through 4-4 for test definitions). Both the CLK and the VPRG pads have internal pull-down resistors.
4.4
1. 2. 3.
Programming Mode
Erase EE Code: Program EE Code: Read EE Code: 0111010100 0111010010 0111010110
4.2
Pin Configuration 4.5
Note:
`0' means logic "Low" (VIL) and `1' means logic "High" (VIH).
Connect antenna A, B and VSS pads to ground.
4.3
1. 2.
Pin Timing
Apply VDDT voltage to VDD. Leave VSS, CLK and VPRG at ground. Load mode code into the VPRG pad. The VPRG is sampled at CLK low to high edge.
Signal Timing
Examples 4-1 through 4-4 show the timing sequence for programming and reading of the device.
EXAMPLE 4-1:
CLK Number: CLK VHH VPRG:
PROGRAMMING MODE 1: ERASE EE
1 2 3 4 5 6 7 8 9 10 11 12
VIH VIL
TWC
Note: Erases entire array to a `1' state between CLK 11 and 12.
EXAMPLE 4-2:
CLK Number:
PROGRAMMING MODE 2: PROGRAM EE
1 2...5 6 7 8 9 10 11 ... 165
CLK: Pulse high to program bit to "0" Leave low to leave bit at "1" VIH VPRG: VIL TWC TWC
VHH...
Program bit #0 ... Program bit #153 Note: Pulsing VPRG to VHH for the bit programming time while holding the CLK low programs the bit to a `0'.
DS21287F-page 10
2002 Microchip Technology Inc.
MCRF355/360
EXAMPLE 4-3:
CLK Number: CLK:
PROGRAMMING MODE 3: READ EE
1 2 5 6 7 8 9 10 11 12 165
VPRG:
VIH... VIL bit #0 bit #1 data data
...
Turn off programmer drive during CLK high so MCRF355 can drive VPRG.
bit #153 data
EXAMPLE 4-4:
TIMING DATA
THIGH TLOW
CLK: THD:DAT VHH VPRG: VIH VIL TAA TSU:STO TSU:DAT VHH VPRG: (Reading) VIH... VIL TSU:HH TDL:HH TWC TPW:STO
2002 Microchip Technology Inc.
DS21287F-page 11
MCRF355/360
5.0 FAILED DIE IDENTIFICATION 7.0
Every die on the wafer is electrically tested according to the data sheet specifications and visually inspected to detect any mechanical damage, such as mechanical cracks and scratches. Any failed die in the test or visual inspection is identified by black colored ink. Therefore, any die covered with black ink should not be used. The ink dot specification: * Ink dot size: 254 m in circular diameter * Position: central third of die * Color: black
NOTICE ON DIE AND WAFER HANDLING
The device is very susceptible to Electro-Static Discharge (ESD), which can cause a critical damage to the device. Special attention is needed during the handling process. Any ultraviolet (UV) light can erase the memory cell contents of an unpackaged device. Fluorescent lights and sunlight can also erase the memory cell, although it takes more time than UV lamps. Therefore, keep any unpackaged device out of UV light and also avoid direct exposure of strong fluorescent lights and shining sunlight. Certain IC manufacturing, COB and tag assembly operations may use UV light. Operations such as backgrind de-tape, certain cleaning procedures, epoxy or glue cure should be done without exposing the die surface to UV light. Using X-ray for die inspection will not harm the die, nor erase memory cell contents.
6.0
WAFER DELIVERY DOCUMENTATION
The wafer is shipped with the following information: * * * * * * Microchip Technology Inc. MP Code Lot Number Total number of wafers in the container Total number of good dice in the container Average die per wafer (DPW) Scribe number of wafers with number of good dice
8.0
REFERENCES
It is recommended that the reader reference the following documents. 1. 2. 3. "Antenna Circuit Design for RFID Applications", AN710, DS00710. "RFID Tag and COB Development Guide with Microchip's RFID Devices", AN830, DS00830. "MCRF355/360 Application Note: Mode of Operation and External Resonance Circuit", AN707, DS00707. "Microchip Development Kit Sample Format for the MCRF355/360 Devices", TB031, DS91031. "MCRF355/360 Reader Reference Design", DS21311.
4. 5.
DS21287F-page 12
2002 Microchip Technology Inc.
MCRF355/360
PACKAGING INFORMATION
8.1 Package Marking Information
8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW Example: MCRF355 XXXXXNNN 0025
8-Lead SOIC (150 mil) XXXXXXXX XXXXYYWW NNN
Example: MCRF355 XXX0025 NNN
Legend:
XX...X Y YY WW NNN
Customer specific information* Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code
Note:
In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information.
*
Standard device marking consists of Microchip part number, year code, week code, and traceability code.
2002 Microchip Technology Inc.
DS21287F-page 13
MCRF355/360
MCRF355 COB
Detail X 1. 2 4 1. 2 4 R0.16 (2X) 5.00 0.40 (max.)
9.50 4. 5 7 1.58
6.27 5.21
4.23 1.85 9.50 0. 0 4
9.50
1.50
1.06
R1.30
9.65 9.65
2.00
0.60(4X)
31.84 35.00
Y
0.80(2X)
9.65
4.90
9.65 9.65
0.30 (ref.) Note 2
5.90
3.88
3.75
Note: 1. Reject hole by device testing 2. Top gate mark (Option) 3. Total package thickness excludes punching burr
R0.20(4X)
1.94 5.60
4. 5 7
2.375
2.52
DS21287F-page 14
2002 Microchip Technology Inc.
0.60(2X)
X
8.00 1 .53(4X)
5.10 6.88
R0.20
MCRF355/360
8-Lead Plastic Dual In-line (P) - 300 mil (PDIP)
E1
D 2 n 1 E
A
A2
c
L A1
eB
B1 p B
UNITS DIMENSION LIMITS Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width Molded Package Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Row Spacing Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic
MIN n p A A2 A1 E E1 D L c B1 B eB .140 .115 .015 .300 .240 .360 .125 .008 .045 .014 .310 5 5
INCHES* NOM 8 .100 .155 .130 .313 .250 .373 .130 .012 .058 .018 .370 10 10
MAX
MIN
.170 .145 .325 .260 .385 .135 .015 .070 .022 .430 15 15
MILLIMETERS NOM 8 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 9.14 9.46 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 10 5 10 5
MAX
4.32 3.68 8.26 6.60 9.78 3.43 0.38 1.78 0.56 10.92 15 15
Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-018
2002 Microchip Technology Inc.
DS21287F-page 15
MCRF355/360
8-Lead Plastic Small Outline (SN) - Narrow, 150 mil (SOIC)
E E1
p
D 2 B n 1
45
h
c A A2
L A1
UNITS DIMENSION LIMITS Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic
MIN n p A A2 A1 E E1 D h L c B .053 .052 .004 .228 .146 .189 .010 .019 0 .008 .013 0 0
INCHES* NOM 8 .050 .061 .056 .007 .237 .154 .193 .015 .025 4 .009 .017 12 12
MAX
MIN
.069 .061 .010 .244 .157 .197 .020 .030 8 .010 .020 15 15
MILLIMETERS NOM 8 1.27 1.35 1.55 1.32 1.42 .10 .18 5.79 6.02 3.71 3.91 4.80 4.90 .25 .38 .48 .62 0 4 .20 .23 .33 .42 0 12 0 12
MAX
1.75 1.55 .25 6.20 3.99 5.00 .51 .76 8 .25 .51 15 15
Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-057
DS21287F-page 16
2002 Microchip Technology Inc.
MCRF355/360
ON-LINE SUPPORT
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092002
2002 Microchip Technology Inc.
DS21287F-page 17
MCRF355/360
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150. Please list the following information, and use this outline to provide us with your comments about this document. To: RE: Technical Publications Manager Reader Response Total Pages Sent ________
From: Name Company Address City / State / ZIP / Country Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Device: MCRF355/360 Questions: 1. What are the best features of this document? Y N Literature Number: DS21287F FAX: (______) _________ - _________
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
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6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21287F-page 18
2002 Microchip Technology Inc.
MCRF355/360
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device X Temperature Range /XXX Package Examples:
a) b) c)
Device: = 13.56 MHz Anti-Collision device. = MCRF355 Cross Technology World II COB module with dual 68 pF capacitors MCRF355/7M = MCRF355 IST I0A2 COB module with dual 68 pF capacitors MCRF355/7M: = MCRF355 COB module with dual 68 pF capacitors. MCRF360 = 13.56 MHz Anti-Collision device with 100 pF on-chip resonance capacitor. MCRF355 MCRF355/6C
MCRF355/W: MCRF355/P:
= 11-mil wafer. = PDIP package.
MCRF355/WF: = 8-mil wafer on frame.
a) b) c)
MCRF360/WFB:= Bumped 8-mil wafer on frame MCRF360/SB: = Bumped 8-mil die. MCRF360/SN: = SOIC package.
Temperature Range:
=
-20C to +70C
Package:
W WB WF WFB P S SB SN
= = = = = = = =
Wafer (11 mil backgrind) Bumped wafer (8 mil backgrind) Sawed wafer on frame (8 mil backgrind) Bumped, sawed wafer on frame (8 mil backgrind) Plastic PDIP (300 mil Body) 8-lead Dice in waffle pack (8 mil) Bumped die in waffle pack (8 mil) Plastic SOIC (150 mil Body) 8-lead
Sales and Support
Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. 2. 3. Your local Microchip sales office The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
2002 Microchip Technology Inc.
DS21287F-page 19
MCRF355/360
NOTES:
DS21287F-page 20
2002 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable."
*
* *
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products.
Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip's products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights.
Trademarks The Microchip name and logo, the Microchip logo, KEELOQ, MPLAB, PIC, PICmicro, PICSTART and PRO MATE are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, microID, MXDEV, MXLAB, PICMASTER, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. dsPIC, dsPICDEM.net, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2002, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999 and Mountain View, California in March 2002. The Company's quality system processes and procedures are QS-9000 compliant for its PICmicro(R) 8-bit MCUs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, non-volatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001 certified.
2002 Microchip Technology Inc.
DS21287F - page 21
WORLDWIDE SALES AND SERVICE
AMERICAS
Corporate Office
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ASIA/PACIFIC
Australia
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Japan
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Rocky Mountain
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China - Beijing
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EUROPE
Austria
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Italy
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10/18/02
DS21287F-page 22
2002 Microchip Technology Inc.
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